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Travelled to:
2 × USA
Collaborated with:
J.Cong A.Jagannathan G.Reinman
Talks about:
microarchitectur (1) hierarch (1) perform (1) cluster (1) physic (1) driven (1) applic (1) multi (1) level (1) evalu (1)

Person: Michail Romesis

DBLP DBLP: Romesis:Michail

Contributed to:

DAC 20032003
DAC 20012001

Wrote 2 papers:

DAC-2003-CongJRR #architecture #evaluation #physics
Microarchitecture evaluation with physical planning (JC, AJ, GR, MR), pp. 32–35.
DAC-2001-CongR #clustering #multi
Performance-Driven Multi-Level Clustering with Application to Hierarchical FPGA Mapping (JC, MR), pp. 389–394.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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