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Travelled to:
1 × USA
2 × France
Collaborated with:
T.Hanyu W.J.Gross A.Matsumoto D.Suzuki S.Matsunaga M.Natsui A.Mochizuki
Talks about:
base (3) power (2) low (2) interconnect (1) architectur (1) nonvolatil (1) asynchron (1) spintron (1) paradigm (1) insensit (1)

Person: Naoya Onizawa

DBLP DBLP: Onizawa:Naoya

Contributed to:

DATE 20152015
DAC 20132013
DATE 20112011

Wrote 3 papers:

DATE-2015-HanyuSOMNM #architecture #in memory #paradigm #power management #reliability #towards
Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm (TH, DS, NO, SM, MN, AM), pp. 1006–1011.
DAC-2013-OnizawaG #clustering #network #power management #scalability
Low-power area-efficient large-scale IP lookup engine based on binary-weighted clustered networks (NO, WJG), p. 6.
DATE-2011-OnizawaMH #communication #monitoring
Interconnect-fault-resilient delay-insensitive asynchronous communication link based on current-flow monitoring (NO, AM, TH), pp. 776–781.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.