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Travelled to:
1 × Mexico
1 × Spain
1 × USA
Collaborated with:
A.Seznec ∅ S.Jourdan P.Sainrat
Talks about:
processor (2) preschedul (1) predictor (1) instruct (1) multipl (1) exploit (1) window (1) migrat (1) execut (1) branch (1)

Person: Pierre Michaud

DBLP DBLP: Michaud:Pierre

Contributed to:

HPCA 20042004
HPCA 20012001
ASPLOS 19961996

Wrote 3 papers:

HPCA-2004-Michaud #capacity #execution #manycore #migration
Exploiting the Cache Capacity of a Single-Chip Multi-Core Processor with Execution Migration (PM), pp. 186–197.
HPCA-2001-MichaudS #data flow #scalability
Data-Flow Prescheduling for Large Instruction Windows in Out-of-Order Processors (PM, AS), pp. 27–36.
ASPLOS-1996-SeznecJSM #branch #multi #predict
Multiple-Block Ahead Branch Predictors (AS, SJ, PS, PM), pp. 116–127.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.