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Travelled to:
2 × USA
Collaborated with:
D.Smith S.McNeary J.Crabbe M.W.Stebnisky M.J.McGinnis J.C.Werbickas A.Feller
Talks about:
automat (2) delay (2) chip (2) technolog (1) synthesi (1) program (1) system (1) compil (1) calcul (1) metal (1)

Person: Rathin Putatunda

DBLP DBLP: Putatunda:Rathin

Contributed to:

DAC 19861986
DAC 19831983
DAC 19821982

Wrote 3 papers:

DAC-1986-PutatundaSMC #compilation #named
HAPPI: a chip compiler based on double-level-metal technology (RP, DS, SM, JC), pp. 736–743.
DAC-1983-StebniskyMWPF #automation #named #synthesis
APSS: An automatic PLA synthesis system (MWS, MJM, JCW, RP, AF), pp. 430–435.
DAC-1982-Putatunda #automation #named
Auto-delay: A program for automatic calculation of delay in LSI/VLSI chips (RP), pp. 616–621.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.