BibSLEIGH corpus
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Travelled to:
1 × France
4 × USA
Collaborated with:
P.L.Montessoro M.S.Reorda M.Rebaudengo F.Somenzi G.Cabodi P.Prinetto M.Mezzalama P.Camurati F.Corno
Talks about:
simul (3) fault (3) algorithm (2) parallel (2) concurr (2) improv (2) effici (2) new (2) architectur (1) multilevel (1)

Person: Silvano Gai

DBLP DBLP: Gai:Silvano

Contributed to:

PDP 19951995
PDP 19941994
DAC 19921992
DAC 19911991
DAC 19881988
DAC 19831983

Wrote 7 papers:

PDP-1995-GaiRR #algorithm #parallel #using
An improved data parallel algorithm for Boolean function manipulation using BDDs (SG, MR, MSR), pp. 33–41.
EDAC-1994-GaiMR #fault #named #performance
TORSIM: An Efficient Fault Simulator for Synchronous Sequential Circuits (SG, PLM, MSR), pp. 46–50.
PDP-1994-CabodiGRR #architecture #parallel
A BDD Package For A Massively Parallel SIMD Architecture (GC, SG, MR, MSR), pp. 212–219.
DAC-1992-CabodiCCGPR #traversal
A New Model for Improving symbolic Product Machine Traversal (GC, PC, FC, SG, PP, MSR), pp. 614–619.
DAC-1991-MontessoroG #concurrent #fault #multi #named #performance #simulation
Creator: General and Efficient Multilevel Concurrent Fault Simulation (PLM, SG), pp. 160–163.
DAC-1988-GaiMS #algorithm #concurrent #fault #performance #simulation
The Performance of the Concurrent Fault Simulation Algorithms in MOZART (SG, PLM, FS), pp. 692–697.
DAC-1983-SomenziGMP #testing #verification
A new integrated system for PLA testing and verification (FS, SG, MM, PP), pp. 57–63.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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