BibSLEIGH corpus
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BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
3 × France
Collaborated with:
W.J.Bainbridge L.A.Plana S.Tan W.Yen M.Merrett P.Asenov Y.Wang M.Zwolinski D.Reid C.Millar S.Roy Z.Liu A.Asenov
Talks about:
design (2) time (2) chip (2) architectur (1) smartcard (1) processor (1) asynchron (1) parallel (1) variabl (1) synthes (1)

Person: Stephen B. Furber

DBLP DBLP: Furber:Stephen_B=

Contributed to:

DATE 20112011
DATE DF 20042004
DATE 19981998

Wrote 4 papers:

DATE-2011-Furber #architecture
Biologically-inspired massively-parallel architectures — Computing beyond a million processors (SBF), p. 1.
DATE-2011-MerrettAWZRMRLFA #analysis #modelling #monte carlo #performance #statistics #variability
Modelling circuit performance variations due to statistical variability: Monte Carlo static timing analysis (MM, PA, YW, MZ, DR, CM, SR, ZL, SBF, AA), pp. 1537–1540.
DATE-DF-2004-BainbridgePF #design #self #using
The Design and Test of a Smartcard Chip Using a CHAIN Self-Timed Network-on-Chip (WJB, LAP, SBF), pp. 274–279.
DATE-1998-TanFY #design
The Design of an Asynchronous VHDL Synthesizer (SYT, SBF, WFY), pp. 44–51.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.