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Travelled to:
1 × USA
3 × France
3 × Germany
Collaborated with:
B.M.Al-Hashimi J.Qi A.Ahmadi Z.R.Yang Y.Lin B.Halak B.Mishra P.Oikonomakos P.R.Wilson J.N.Ross A.D.Brown Y.Kiliç M.Merrett P.Asenov Y.Wang D.Reid C.Millar S.Roy Z.Liu S.B.Furber A.Asenov
Talks about:
circuit (3) model (3) analysi (2) variat (2) simul (2) fault (2) use (2) subthreshold (1) rectangular (1) transient (1)

Person: Mark Zwolinski

DBLP DBLP: Zwolinski:Mark

Contributed to:

DATE 20142014
DATE 20112011
DATE 20092009
DAC 20082008
DATE 20032003
DATE 20022002
DATE 19991999

Wrote 8 papers:

DATE-2014-LinZH #low cost
A low-cost radiation hardened flip-flop (YL, MZ, BH), pp. 1–6.
DATE-2014-QiZ #modelling #performance #simulation
Efficient simulation and modelling of non-rectangular NoC topologies (JQ, MZ), pp. 1–4.
DATE-2011-MerrettAWZRMRLFA #analysis #modelling #monte carlo #performance #statistics #variability
Modelling circuit performance variations due to statistical variability: Monte Carlo static timing analysis (MM, PA, YW, MZ, DR, CM, SR, ZL, SBF, AA), pp. 1537–1540.
DATE-2009-MishraAZ #adaptation
Variation resilient adaptive controller for subthreshold circuits (BM, BMAH, MZ), pp. 142–147.
DAC-2008-AhmadiZ #analysis #approach #hardware #optimisation
Symbolic noise analysis approach to computational hardware optimization (AA, MZ), pp. 391–396.
DATE-2003-OikonomakosZA #metric #online #self #synthesis #testing #using
Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric (PO, MZ, BMAH), pp. 10596–10601.
DATE-2002-WilsonRZBK #behaviour #fault #modelling #using
Behavioural Modelling of Operational Amplifier Faults Using VHDL-AMS (PRW, JNR, MZ, ADB, YK), p. 1133.
DATE-1999-YangZ #fault #performance #robust #simulation
Fast, Robust DC and Transient Fault Simulation for Nonlinear Analog Circuits (ZRY, MZ), pp. 244–248.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.