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Travelled to:
1 × USA
Collaborated with:
H.Matsutani M.Koibuchi H.Amano
Talks about:
router (2) architectur (1) predict (1) latenc (1) anoth (1) chip (1) yet (1) low (1)

Person: Tsutomu Yoshinaga

DBLP DBLP: Yoshinaga:Tsutomu

Contributed to:

HPCA 20092009

Wrote 1 papers:

HPCA-2009-MatsutaniKAY #architecture #latency #predict
Prediction router: Yet another low latency on-chip router architecture (HM, MK, HA, TY), pp. 367–378.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.