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Travelled to:
1 × USA
Collaborated with:
A.P.Ng P.Sadayappan
Talks about:
circuit (2) simul (2) supercomput (1) framework (1) schedul (1) vector (1) matrix (1) factor (1) effici (1) spars (1)

Person: V. Visvanathan

DBLP DBLP: Visvanathan:V=

Contributed to:

DAC 19891989

Wrote 2 papers:

DAC-1989-NgV #framework #multi #scheduling #simulation
A Framework for Scheduling Multi-Rate Circuit Simulation (APCN, VV), pp. 19–24.
DAC-1989-SadayappanV #matrix #performance #simulation
Efficient Sparse Matrix Factorization for Circuit Simulation on Vector Supercomputers (PS, VV), pp. 13–18.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.