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Travelled to:
1 × France
Collaborated with:
S.Huang C.Cheng
Talks about:
clock (2) path (2) synthesi (1) minimum (1) control (1) period (1) gate (1) data (1)

Person: Wen-Pin Tu

DBLP DBLP: Tu:Wen=Pin

Contributed to:

DATE 20132013

Wrote 1 papers:

DATE-2013-TuHC
Co-synthesis of data paths and clock control paths for minimum-period clock gating (WPT, SHH, CHC), pp. 1831–1836.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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