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Travelled to:
1 × Brazil
1 × Cyprus
1 × Hungary
1 × India
1 × Switzerland
1 × Taiwan
4 × USA
Collaborated with:
S.Roy A.M.Dani B.Amrutur K.Vaswani M.J.Thazhuthaveetil K.Nagar A.Rangasamy S.K.Anand A.Ramamurthi C.Bhattacharyya K.Varadarajan P.J.Joseph
Talks about:
path (6) profil (4) algorithm (3) optim (3) dataflow (2) program (2) analysi (2) sensit (2) model (2) genet (2)

Person: Y. N. Srikant

DBLP DBLP: Srikant:Y=_N=

Contributed to:

VMCAI 20152015
PDP 20122012
ESEC/FSE 20112011
SAC 20112011
CC 20102010
SAC 20102010
CGO 20092009
SAC 20082008
CGO 20072007
CGO 20052005
HPDC 20052005

Wrote 12 papers:

VMCAI-2015-NagarS #analysis #using
Path Sensitive Cache Analysis Using Cache Miss Paths (KN, YNS), pp. 43–60.
PDP-2012-DaniASB #concurrent #named #parallel #predict #source code #thread
TCP: Thread Contention Predictor for Parallel Programs (AMD, BA, YNS, CB), pp. 19–26.
ESEC-FSE-2011-RamamurthiRS #analysis #data flow #graph #probability #using
Probabilistic dataflow analysis using path profiles on structure graphs (AR, SR, YNS), pp. 512–515.
SAC-2011-DaniAS #algorithm #architecture #manycore #search-based
Applying genetic algorithms to optimize the power in tiled SNUCA chip multicore architectures (AMD, BA, YNS), pp. 1090–1091.
SAC-2011-RangasamyS #effectiveness #modelling #parallel #performance #petri net #source code #thread
Petri net based performance modeling for effective DVFS for multithreaded programs (AR, YNS), pp. 647–648.
CC-2010-RoyS #optimisation
The Hot Path SSA Form: Extending the Static Single Assignment Form for Speculative Optimizations (SR, YNS), pp. 304–323.
SAC-2010-DaniVAS #manycore
Accelerating multi-core simulators (AMD, KV, BA, YNS), pp. 2377–2382.
CGO-2009-RoyS #algorithm #profiling
Profiling k-Iteration Paths: A Generalization of the Ball-Larus Profiling Algorithm (SR, YNS), pp. 70–80.
SAC-2008-RoyS #data flow #problem
Improving flow-insensitive solutions for non-separable dataflow problems (SR, YNS), pp. 211–216.
CGO-2007-VaswaniTSJ #architecture #compilation #empirical #modelling #optimisation
Microarchitecture Sensitive Empirical Models for Compiler Optimizations (KV, MJT, YNS, PJJ), pp. 131–143.
CGO-2005-VaswaniTS #hardware #profiling #programmable
A Programmable Hardware Path Profiler (KV, MJT, YNS), pp. 217–228.
HPDC-2005-AnandS #algorithm #automation #clustering #search-based
Genetic algorithm based automatic data partitioning scheme for HPF (SKA, YNS), pp. 289–290.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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