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Used together with:
retim (4)
optim (3)
base (3)
driven (3)
perform (2)

Stem resynthesi$ (all stems)

12 papers:

DACDAC-2008-HuSMH #multi #reduction
FPGA area reduction by multi-output function based sequential resynthesis (YH, VS, RM, LH), pp. 24–29.
TACASTACAS-2005-Jiang #invariant #on the
On Some Transformation Invariants Under Retiming and Resynthesis (JHRJ), pp. 413–428.
DACDAC-2002-ChelceaN #optimisation #scalability
Resynthesis and peephole transformations for the optimization of large-scale asynchronous systems (TC, SMN), pp. 405–410.
DACDAC-1999-Pan #integration
Performance-Driven Integration of Retiming and Resynthesis (PP), pp. 243–246.
DACDAC-1999-SuWL #interactive
A Timing-Driven Soft-Macro Resynthesis Method in Interaction with Chip Floorplanning (HPS, ACHW, YLL), pp. 262–267.
DATEDATE-1999-KallaC #equivalence #performance
Performance Driven Resynthesis by Exploiting Retiming-Induced State Register Equivalence (PK, MJC), pp. 638–642.
DATEEDTC-1997-CortadellaKKLY #composition #independence
Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis (JC, MK, AK, LL, AY), pp. 98–105.
DACDAC-1994-ChakradharD
Resynthesis and Retiming for Optimum Partial Scan (STC, SD), pp. 87–93.
DACDAC-1993-EvekingH #optimisation
Optimization and Resynthesis of Complex Data-Paths (HE, SH), pp. 637–641.
DACDAC-1993-ShenoyBS #multi #pipes and filters
Resynthesis of Multi-Phase Pipelines (NVS, RKB, ALSV), pp. 490–496.
DACDAC-1991-ChenMMF #approach #network #optimisation
A Resynthesis Approach for Network Optimization (KCC, YM, SM, MF), pp. 458–463.
DACDAC-1990-DeyBK #clustering
Corolla Based Circuit Partitioning and Resynthesis (SD, FB, GK), pp. 607–612.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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