Partitioning of logic graphs: A theoretical analysis of pin reduction
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Robert B. Hitchcock Sr.
Partitioning of logic graphs: A theoretical analysis of pin reduction
DAC, 1970.

DAC 1970
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@inproceedings{DAC-1970-Sr,
	author        = "Robert B. Hitchcock Sr.",
	booktitle     = "{Proceedings of the Eighth Design Automation Workshop}",
	doi           = "10.1145/800160.805112",
	pages         = "54--63",
	publisher     = "{ACM}",
	title         = "{Partitioning of logic graphs: A theoretical analysis of pin reduction}",
	year          = 1970,
}

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