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Travelled to:
3 × USA
Collaborated with:

Talks about:
cellular (2) analysi (2) time (2) techniqu (1) theoret (1) program (1) reduct (1) partit (1) verif (1) model (1)

Person: Robert B. Hitchcock Sr.

DBLP DBLP: Sr.:Robert_B=_Hitchcock

Facilitated 4 volumes:

DAC 1975Ed
DAC 1974Ed
DAC 1973Ed
DAC 1972Ed

Contributed to:

DAC 19821982
DAC 19701970
DAC 19691969

Wrote 3 papers:

DAC-1982-Sr #analysis #verification
Timing Verification and the Timing Analysis program (RBHS), pp. 594–604.
DAC-1970-Sr #analysis #clustering #graph #logic #reduction
Partitioning of logic graphs: A theoretical analysis of pin reduction (RBHS), pp. 54–63.
DAC-1969-Sr #modelling
Cellular wiring and the cellular modeling technique (RBHS), pp. 25–41.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.