Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour
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Ivo Bolsens, W. De Rammelaere, Luc J. M. Claesen, Hugo De Man
Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour
DAC, 1989.

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@inproceedings{DAC-1989-BolsensRCM,
	author        = "Ivo Bolsens and W. De Rammelaere and Luc J. M. Claesen and Hugo De Man",
	booktitle     = "{Proceedings of the 26th Design Automation Conference}",
	doi           = "10.1145/74382.74468",
	pages         = "513--518",
	publisher     = "{ACM Press}",
	title         = "{Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour}",
	year          = 1989,
}

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