BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × USA
Collaborated with:
I.Bolsens L.J.M.Claesen H.D.Man
Talks about:
behaviour (1) synchron (1) exploit (1) circuit (1) analysi (1) intend (1) electr (1) logic (1) debug (1) vlsi (1)

Person: W. De Rammelaere

DBLP DBLP: Rammelaere:W=_De

Contributed to:

DAC 19891989

Wrote 1 papers:

DAC-1989-BolsensRCM #analysis #behaviour #debugging #logic
Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour (IB, WDR, LJMC, HDM), pp. 513–518.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.