Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator
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Thomas M. Niermann, Wu-Tung Cheng, Janak H. Patel
Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator
DAC, 1990.

DAC 1990
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@inproceedings{DAC-1990-NiermannCP,
	author        = "Thomas M. Niermann and Wu-Tung Cheng and Janak H. Patel",
	booktitle     = "{Proceedings of the 27th Design Automation Conference}",
	doi           = "10.1145/123186.123396",
	isbn          = "0-89791-363-9",
	pages         = "535--540",
	publisher     = "{IEEE Computer Society Press}",
	title         = "{Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator}",
	year          = 1990,
}

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