Irith Pomeranz, Sudhakar M. Reddy
Built-In Generation of Weighted Test Sequences for Synchronous Sequential Circuits
DATE, 2000.
@inproceedings{DATE-2000-PomeranzR,
author = "Irith Pomeranz and Sudhakar M. Reddy",
booktitle = "{Proceedings of the Fifth Conference on Design, Automation and Test in Europe}",
doi = "10.1109/DATE.2000.840287",
isbn = "0-7695-0537-6",
pages = "298--304",
publisher = "{IEEE Computer Society}",
title = "{Built-In Generation of Weighted Test Sequences for Synchronous Sequential Circuits}",
year = 2000,
}











