BibSLEIGH — Sudhakar_M

Travelled to:

19 × USA
7 × Germany
8 × France

Collaborated with:

I.Pomeranz J.Rajski R.Guo S.Kundu B.Becker W.Li D.Lee V.G.Hemmady R.Galivanche G.Chen C.Liu I.Polian X.Lin P.Uppaluri W.N.Li S.Sahni M.K.Reddy P.Agrawal V.D.Agrawal S.K.Jain A.Kumar S.Remersaro X.Tang W.Cheng S.Venkataraman B.Seshadri C.Yu U.Sparmann D.Luxenburger K.Cheng S.Kajihara K.Kinoshita H.Tang C.Wang

Talks about:

test (37) fault (30) circuit (22) generat (17) sequenti (10) scan (10) detect (9) base (9) use (9) synchron (8)

Person: Sudhakar M. Reddy

DBLP: Reddy:Sudhakar_M=

Contributed to:

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

2001

2000

1999

1998

1997

1996

1995

1994

1993

1992

1991

1989

1988

1987

1985

1984

Wrote 59 papers:

DATE-2011-KumarRPB #3d #clustering #testing: Hyper-graph based partitioning to reduce DFT cost for pre-bond 3D-IC testing (AK, SMR, IP, BB), pp. 1424–1429.
DATE-2010-PomeranzR #requirements #sequence #testing #using: Reducing the storage requirements of a test sequence by using a background vector (IP, SMR), pp. 1237–1242.
DATE-2010-PomeranzR10a #functional #on the #testing: On reset based functional broadside tests (IP, SMR), pp. 1438–1443.
DATE-2009-PomeranzR #fault: Selection of a fault model for fault diagnosis based on unique responses (IP, SMR), pp. 994–999.
DATE-2009-RemersaroRRP #generative #scalability #testing: A scalable method for the generation of small test sets (SR, JR, SMR, IP), pp. 1136–1141.
DATE-2009-TangGCR #generative #multi: Improving compressed test pattern generation for multiple scan chain failure diagnosis (XT, RG, WTC, SMR), pp. 1000–1005.
DAC-2008-ReddyPL #detection #on the #testing: On tests to detect via opens in digital CMOS circuits (SMR, IP, CL), pp. 840–845.
DATE-2008-PomeranzR #detection #fault #logic: A Bridging Fault Model Where Undetectable Faults Imply Logic Redundancy (IP, SMR), pp. 1166–1171.
DATE-2008-PomeranzR08a #fault #taxonomy: A Same/Different Fault Dictionary: An Extended Pass/Fail Fault Dictionary with Improved Diagnostic Resolution (IP, SMR), pp. 1474–1479.
DATE-2007-PomeranzR #generative #on the #testing: On test generation by input cube avoidance (IP, SMR), pp. 522–527.
DAC-2006-ChenRPR #algorithm: A test pattern ordering algorithm for diagnosis with truncated fail data (GC, SMR, IP, JR), pp. 399–404.
DATE-2006-PomeranzR #detection #fault #generative #testing: Generation of broadside transition fault test sets that detect four-way bridging faults (IP, SMR), pp. 907–912.
DATE-2006-PomeranzR06a #fault: Test compaction for transition faults under transparent-scan (IP, SMR), pp. 1264–1269.
DATE-2005-PomeranzR #analysis #detection #testing #worst-case: Worst-Case and Average-Case Analysis of n-Detection Test Sets (IP, SMR), pp. 444–449.
DATE-2005-PomeranzR05a #detection #fault #heuristic: The Accidental Detection Index as a Fault Ordering Heuristic for Full-Scan Circuits (IP, SMR), pp. 1008–1013.
DATE-2005-TangCRWRP #fault: Defect Aware Test Patterns (HT, GC, SMR, CW, JR, IP), pp. 450–455.
DAC-2004-LiRP #fault #generative #on the #testing: On test generation for transition faults with minimized peak power dissipation (WL, SMR, IP), pp. 504–509.
DATE-v1-2004-PomeranzR #fault #metric #similarity: Level of Similarity: A Metric for Fault Collapsing (IP, SMR), pp. 56–61.
DATE-v1-2004-PomeranzVRS #detection #fault: Z-Sets and Z-Detections: Circuit Characteristics that Simplify Fault Diagnosis (IP, SV, SMR, BS), pp. 68–75.
DAC-2003-LiYRP #generative #markov #using: A scan BIST generation method using a markov source and partial bit-fixing (WL, CY, SMR, IP), pp. 554–559.
DAC-2003-PomeranzR #detection #on the #testing: On test data compression and n-detection test sets (IP, SMR), pp. 748–751.
DATE-2003-PolianBR #markov #optimisation #pseudo #random: Evolutionary Optimization of Markov Sources for Pseudo Random Scan BIST (IP, BB, SMR), pp. 11184–11185.
DATE-2003-PomeranzR #approach #generative #testing: A New Approach to Test Generation and Test Compaction for Scan Circuits (IP, SMR), pp. 11000–11005.
DATE-2003-PomeranzR03a #dependence #testing: Test Data Compression Based on Output Dependence (IP, SMR), pp. 11186–11187.
DATE-2003-PomeranzRK #detection #fault #on the: On the Characterization of Hard-to-Detect Bridging Faults (IP, SMR, SK), pp. 11012–11019.
DAC-2002-PomeranzKR #on the: On output response compression in the presence of unknown output values (IP, SK, SMR), pp. 255–258.
DATE-2002-PomeranzR #fault #multi #set #using: Test Enrichment for Path Delay Faults Using Multiple Sets of Target Faults (IP, SMR), pp. 722–729.
DATE-2002-PomeranzRR #debugging #fault: Finding a Common Fault Response for Diagnosis during Silicon Debug (IP, JR, SMR), p. 1116.
DAC-2001-PomeranzR #approach #testing: An Approach to Test Compaction for Scan Circuits that Enhances At-Speed Testing (IP, SMR), pp. 156–161.
DATE-2001-PomeranzR #order #sequence: Sequence reordering to improve the levels of compaction achievable by static compaction procedures (IP, SMR), pp. 214–218.
DATE-2001-PomeranzR01a #detection #effectiveness #fault #generative #testing: Definitions of the numbers of detections of target faults and their effectiveness in guiding test generation for high defect coverage (IP, SMR), pp. 504–508.
DAC-2000-PomeranzR #fault #on the: On diagnosis of pattern-dependent delay faults (IP, SMR), pp. 59–62.
DATE-2000-PomeranzR #generative #sequence #testing: Built-In Generation of Weighted Test Sequences for Synchronous Sequential Circuits (IP, SMR), pp. 298–304.
DATE-2000-PomeranzR00a #functional #generative #testing: Functional Test Generation for Full Scan Circuits (IP, SMR), pp. 396–401.
DAC-1999-GuoRP #generative #named #using: Proptest: A Property Based Test Pattern Generator for Sequential Circuits Using Test Compaction (RG, SMR, IP), pp. 653–659.
DAC-1999-PomeranzR #generative #sequence #testing: Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Test Subsequences (IP, SMR), pp. 754–759.
DATE-1999-LinPR #fault: Full Scan Fault Coverage With Partial Scan (XL, IP, SMR), pp. 468–472.
DATE-1998-GuoPR #sequence #testing: Procedures for Static Compaction of Test Sequences for Synchronous Sequential Circuits Based on Vector Restoration (RG, IP, SMR), pp. 583–587.
DATE-1998-PomeranzR #flexibility #logic #synthesis: A Synthesis Procedure for Flexible Logic Functions (IP, SMR), pp. 973–974.
DATE-1998-PomeranzR98a #using: Design-for-Testability for Synchronous Sequential Circuits using Locally Available Lines (IP, SMR), pp. 983–984.
DAC-1997-PomeranzR #approach #fault #multi #simulation #using: Fault Simulation under the Multiple Observation Time Approach using Backward Implications (IP, SMR), pp. 608–613.
EDTC-1997-PomeranzR #generative #on the #optimisation #search-based #testing: On improving genetic optimization based test generation (IP, SMR), pp. 506–511.
EDTC-1997-PomeranzR97a #finite #on the #state machine #testing: On the use of reset to increase the testability of interconnected finite-state machines (IP, SMR), pp. 554–559.
DAC-1996-PomeranzR #on the #sequence #testing: On Static Compaction of Test Sequences for Synchronous Sequential Circuits (IP, SMR), pp. 215–220.
DAC-1995-PomeranzR #logic #on the: On Synthesis-for-Testability of Combinational Logic Circuits (IP, SMR), pp. 126–132.
DAC-1995-SparmannLCR #fault #identification #performance #robust: Fast Identification of Robust Dependent Path Delay Faults (US, DL, KTC, SMR), pp. 119–125.
DAC-1994-PomeranzR #combinator #fault #scalability #using: Design-for-Testability for Path Delay Faults in Large Combinatorial Circuits Using Test-Points (IP, SMR), pp. 358–364.
DAC-1994-PomeranzR94a #fault #on the: On Improving Fault Diagnosis for Synchronous Sequential Circuits (IP, SMR), pp. 504–509.
DAC-1993-KajiharaPKR #effectiveness #fault #generative #logic #testing: Cost-Effective Generation of Minimal Test Sets for Stuck-at Faults in Combinational Logic Circuits (SK, IP, KK, SMR), pp. 102–106.
DAC-1993-PomeranzR #generative #incremental #learning #named #testing: INCREDYBLE-TG: INCREmental DYnamic test generation based on LEarning (IP, SMR), pp. 80–85.
DAC-1993-PomeranzRU #fault #generative #named #testing: NEST: A Non-Enumerative Test Generation Method for Path Delay Faults in Combinational Circuits (IP, SMR, PU), pp. 439–445.
DAC-1992-LeeR92a #concurrent #fault #on the #performance #simulation: On Efficient Concurrent Fault Simulation for Synchronous Sequential Circuits (DHL, SMR), pp. 327–331.
DAC-1992-PomeranzR #testing: At-Speed Delay Testing of Synchronous Sequential Circuits (IP, SMR), pp. 177–181.
DAC-1991-PomeranzR #fault #on the #using: On Achieving a Complete Fault Coverage for Sequential Machines Using the Transition Fault Model (IP, SMR), pp. 341–346.
DAC-1989-HemmadyR #on the: On the Repair of Redundant RAMs (VGH, SMR), pp. 710–713.
DAC-1988-LiRS #logic #on the: On Path Selection in Combinational Logic Circuits (WNL, SMR, SS), pp. 142–147.
DAC-1987-GalivancheR #parallel: A Parallel PLA Minimization Program (RG, SMR), pp. 600–607.
DAC-1985-ReddyRA #generative #testing: Transistor level test generation for MOS circuits (MKR, SMR, PA), pp. 825–828.
DAC-1984-ReddyAJ #detection #fault #logic: A gate level model for CMOS combinational logic circuits with application to fault detection (SMR, VDA, SKJ), pp. 504–509.