BibSLEIGH — Hierarchical memory mapping during synthesis in FPGA-based reconfigurable computers

Iyad Ouaiss, Ranga Vemuri
Hierarchical memory mapping during synthesis in FPGA-based reconfigurable computers
DATE, 2001.

DATE 2001

@inproceedings{DATE-2001-OuaissV,
	author        = "Iyad Ouaiss and Ranga Vemuri",
	booktitle     = "{Proceedings of the Sixth Conference on Design, Automation and Test in Europe}",
	doi           = "10.1145/367072.367841",
	isbn          = "0-7695-0993-2",
	pages         = "650--657",
	publisher     = "{ACM}",
	title         = "{Hierarchical memory mapping during synthesis in FPGA-based reconfigurable computers}",
	year          = 2001,
}

Iyad Ouaiss, Ranga VemuriHierarchical memory mapping during synthesis in FPGA-based reconfigurable computersDATE, 2001.

Tags:

Iyad Ouaiss, Ranga Vemuri
Hierarchical memory mapping during synthesis in FPGA-based reconfigurable computers
DATE, 2001.