A scalable, timing-safe, network-on-chip architecture with an integrated clock distribution method
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Tobias Bjerregaard, Mikkel Bystrup Stensgaard, Jens Sparsø
A scalable, timing-safe, network-on-chip architecture with an integrated clock distribution method
DATE, 2007.

DATE 2007
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@inproceedings{DATE-2007-BjerregaardSS,
	author        = "Tobias Bjerregaard and Mikkel Bystrup Stensgaard and Jens Sparsø",
	booktitle     = "{Proceedings of the 11th Conference on Design, Automation and Test in Europe}",
	doi           = "10.1145/1266366.1266503",
	isbn          = "978-3-9810801-2-4",
	pages         = "648--653",
	publisher     = "{ACM}",
	title         = "{A scalable, timing-safe, network-on-chip architecture with an integrated clock distribution method}",
	year          = 2007,
}

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