Transistor-level gate model based statistical timing analysis considering correlations
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Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs
Transistor-level gate model based statistical timing analysis considering correlations
DATE, 2012.

DATE 2012
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@inproceedings{DATE-2012-TangZBM,
	acmid         = "2492939",
	author        = "Qin Tang and Amir Zjajo and Michel Berkelaar and Nick van der Meijs",
	booktitle     = "{Proceedings of the 16th Conference and Exhibition on Design, Automation and Test in Europe}",
	isbn          = "978-1-4577-2145-8",
	pages         = "917--922",
	publisher     = "{IEEE}",
	title         = "{Transistor-level gate model based statistical timing analysis considering correlations}",
	year          = 2012,
}

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