Capturing post-silicon variation by layout-aware path-delay testing
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Xiaolin Zhang, Jing Ye, Yu Hu, Xiaowei Li
Capturing post-silicon variation by layout-aware path-delay testing
DATE, 2013.

DATE 2013
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@inproceedings{DATE-2013-ZhangYH0,
	acmid         = "2485359",
	author        = "Xiaolin Zhang and Jing Ye and Yu Hu and Xiaowei Li",
	booktitle     = "{Proceedings of the 17th Conference on Design, Automation and Test in Europe}",
	isbn          = "978-1-4503-2153-2",
	pages         = "288--291",
	publisher     = "{EDA Consortium San Jose, CA, USA / ACM DL}",
	title         = "{Capturing post-silicon variation by layout-aware path-delay testing}",
	year          = 2013,
}

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