Michael Shoniker, Bruce F. Cockburn, Jie Han, Witold Pedrycz
Minimizing the number of process corner simulations during design verification
DATE, 2015.
@inproceedings{DATE-2015-ShonikerCHP,
acmid = "2755817",
author = "Michael Shoniker and Bruce F. Cockburn and Jie Han and Witold Pedrycz",
booktitle = "{Proceedings of the 19th Conference and Exhibition on Design, Automation and Test in Europe}",
isbn = "978-3-9815370-4-8",
pages = "289--292",
publisher = "{ACM}",
title = "{Minimizing the number of process corner simulations during design verification}",
year = 2015,
}