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Travelled to:
1 × France
1 × Germany
1 × United Kingdom
Collaborated with:
F.Lombardi P.Jonker K.Chen P.Junsangsri C.Liu M.Shoniker B.F.Cockburn W.Pedrycz
Talks about:
approxim (2) nanocomput (1) processor (1) recoveri (1) parallel (1) multipli (1) configur (1) volatil (1) reliabl (1) process (1)

Person: Jie Han

DBLP DBLP: Han:Jie

Contributed to:

DATE 20152015
DATE 20142014
ICPR v3 20042004

Wrote 5 papers:

DATE-2015-ChenLH #approximate #reliability
An approximate voting scheme for reliable computing (KC, FL, JH), pp. 293–296.
DATE-2015-ShonikerCHP #design #process #simulation #verification
Minimizing the number of process corner simulations during design verification (MS, BFC, JH, WP), pp. 289–292.
DATE-2014-JunsangsriLH #concurrent #detection #hybrid
A hybrid non-volatile SRAM cell with concurrent SEU detection and correction (PJ, FL, JH), pp. 1–4.
DATE-2014-LiuHL #approximate #configuration management #fault #multi #power management
A low-power, high-performance approximate multiplier with configurable partial error recovery (CL, JH, FL), pp. 1–4.
ICPR-v3-2004-HanJ #fault tolerance #image #parallel
From Massively Parallel Image Processors to Fault-Tolerant Nanocomputers (JH, PJ), pp. 2–7.

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