MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays Using Reconvergence Analysis
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter

A. Manoj Kumar, Jayaram Bobba, V. Kamakoti
MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays Using Reconvergence Analysis
DATE, 2004.

DATE v2 2004
DBLP
Scholar
DOI
Full names Links ISxN
@inproceedings{DATE-v2-2004-KumarBK,
	author        = "A. Manoj Kumar and Jayaram Bobba and V. Kamakoti",
	booktitle     = "{Proceedings of the Eighth Conference on Design, Automation and Test in Europe, Volume 2}",
	doi           = "10.1109/DATE.2004.1269008",
	isbn          = "0-7695-2085-5",
	pages         = "922--929",
	publisher     = "{IEEE Computer Society}",
	title         = "{MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays Using Reconvergence Analysis}",
	year          = 2004,
}

Tags:



Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.