Travelled to:1 × Germany
3 × France
Collaborated with:V.R.Devanathan C.P.Ravikumar A.M.Kumar J.Bobba R.Pradeep S.Vinay S.Burman S.Trinadh C.S.Babu S.G.Singh S.Potluri
Talks about:power (3) test (3) algorithm (2) scan (2) fill (2) map (2) technolog (1) reconverg (1) processor (1) interact (1)
Person: V. Kamakoti
DBLP: Kamakoti:V=
Contributed to:
2015200720052004Wrote 4 papers:
- DATE-2015-TrinadhBSPK #approach #named #programming #testing
- DP-fill: a dynamic programming approach to X-filling for minimizing peak test power in scan tests (ST, CSB, SGS, SP, VK), pp. 836–841.
- DATE-2007-DevanathanRK #generative #interactive #testing
- Interactive presentation: On power-profiling and pattern generation for power-safe scan tests (VRD, CPR, VK), pp. 534–539.
- DATE-2005-PradeepVBK #agile #on-demand
- FPGA based Agile Algorithm-On-Demand Co-Processor (RP, SV, SB, VK), pp. 82–83.
- DATE-v2-2004-KumarBK #algorithm #analysis #array #embedded #memory management #named #reduction #using
- MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays Using Reconvergence Analysis (AMK, JB, VK), pp. 922–929.