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Travelled to:
1 × USA
Collaborated with:
Talks about:
simul (2) symphoni (1) parallel (1) backplan (1) system (1) vlsi (1) mode (1) mix (1)

Person: Antonio R. W. Todesco

DBLP DBLP: Todesco:Antonio_R=_W=

Contributed to:

DAC 19961996

Wrote 1 papers:

DAC-1996-TodescoM #named #parallel #simulation
Symphony: A Simulation Backplane for Parallel Mixed-Mode Co-Simulation of VLSI Systems (ARWT, THYM), pp. 149–154.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.