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Travelled to:
1 × USA
Collaborated with:
J.Dyer E.J.Moran W.D.Smart
Talks about:
processor (1) graphic (1) circuit (1) design (1) simul (1) use (1) lab (1) gte (1)

Person: Arijit Laha

DBLP DBLP: Laha:Arijit

Contributed to:

DAC 19801980

Wrote 1 papers:

DAC-1980-DyerLMS #design #simulation #using
The use of graphics processors for circuit design simulation at GTE AE Labs (JD, AL, EJM, WDS), pp. 446–450.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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