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Travelled to:
1 × Canada
2 × USA
Collaborated with:
C.Szepesvári L.P.Kaelbling J.Dyer A.Laha E.J.Moran
Talks about:
learn (2) processor (1) reinforc (1) interpol (1) practic (1) graphic (1) continu (1) circuit (1) design (1) space (1)

Person: William D. Smart

DBLP DBLP: Smart:William_D=

Contributed to:

ICML 20042004
ICML 20002000
DAC 19801980

Wrote 3 papers:

ICML-2004-SzepesvariS
Interpolation-based Q-learning (CS, WDS).
ICML-2000-SmartK #learning
Practical Reinforcement Learning in Continuous Spaces (WDS, LPK), pp. 903–910.
DAC-1980-DyerLMS #design #simulation #using
The use of graphics processors for circuit design simulation at GTE AE Labs (JD, AL, EJM, WDS), pp. 446–450.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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