Edwin B. Hassler Jr.
Proceedings of the 17th Design Automation Conference
DAC, 1980.

@proceedings{DAC-1980,
	acmid         = "800139",
	address       = "Minneapolis, Minnesota, USA",
	editor        = "Edwin B. Hassler Jr.",
	isbn          = "0-89791-020-6",
	publisher     = "{ACM/IEEE}",
	title         = "{Proceedings of the 17th Design Automation Conference}",
	year          = 1980,
}

Contents (93 items)

32 ×#design
16 ×#automation
9 ×#analysis
8 ×#logic
7 ×#simulation
6 ×#fault
6 ×#interactive
6 ×#layout
6 ×#performance
6 ×#problem

DAC-1980-Hassler

Chairman’s introduction (EBHJ), p. 1.

DAC-1980-Haddad

Keynote speaker (JAH), p. 2.

DAC-1980-Rosenberg #automation #design #evolution

The evolution of design automation to meet the challanges of VLSI (LMR), pp. 3–11.

DAC-1980-HightowerB

A generalized channel router (DWH, RLB), pp. 12–21.

DAC-1980-SatoSNOY

A “grid-free” channel router (KS, HS, TN, MO, TY), pp. 22–31.

DAC-1980-DeutschG

An over-the-cell router (DND, PG), pp. 32–39.

DAC-1980-ChelottiB #architecture #automation #design #scalability

Design automation at a large architect-engineer (EFC, DPB), pp. 40–49.

DAC-1980-Eastman #database

System facilities for CAD databases (CME), pp. 50–56.

DAC-1980-Sidle #database

Weaknesses of commercial data base management systems in engineering applications (TS), pp. 57–61.

DAC-1980-El-Ziq #generative

A new test pattern generation system (YMEZ), pp. 62–68.

DAC-1980-AbramoviciB #analysis #fault

Fault diagnosis based on effect-cause analysis: An introduction (MA, MAB), pp. 69–76.

DAC-1980-Goel #analysis #generative #testing

Test generation costs analysis and projections (PG), pp. 77–84.

DAC-1980-KimS #design #implementation

Issues in IC implementation of high level, abstract designs (JHK, DPS), pp. 85–91.

DAC-1980-ShirakawaOHTO #layout #logic #random

A layout system for the random logic portion of MOS LSI (IS, NO, TH, ST, HO), pp. 92–99.

DAC-1980-Ramsay #array #automation #design #logic

Automation of design for uncommitted logic array (FRR), pp. 100–107.

DAC-1980-GouldE #array #design #standard

The standard transistor array (STAR): Part I A two-layer metal semicustom design system (JMG, TME), pp. 108–113.

DAC-1980-Miller #analysis #automation #design

Inter-active graphic methods for automating mechanical engineering design and analyses (JMM), pp. 114–128.

DAC-1980-Patel

Computer-aided assignment of manufacturing tolerances (AMP), pp. 129–133.

DAC-1980-Currier #automation #design

Automation of sheet metal design and manufacturing (DWC), pp. 134–138.

DAC-1980-McWilliams #constraints #scalability #verification

Verification of timing constraints on large digital systems (TMM), pp. 139–147.

DAC-1980-AltmanP #analysis #design

The SLIDE simulator: A facility for the design and analysis of computer interconnections (AHA, ACP), pp. 148–155.

DAC-1980-CoryC #correctness #design #verification

Developments in verification of design correctness (WEC, WMvC), pp. 156–164.

DAC-1980-Frew #algorithm #architecture #design #overview

A survey of space allocation algorithms in use in architectural design in the past twenty years (RSF), pp. 165–174.

DAC-1980-GrasonN #design #generative #testing

Digital test generation and design for testability (JG, AWN), pp. 175–189.

DAC-1980-GoldsteinT #analysis #named

SCOAP: Sandia controllability/observability analysis program (LHG, ELT), pp. 190–196.

DAC-1980-Northcutt #design #fault #implementation

The design and implementation of fault insertion capabilities for ISPS (JDN), pp. 197–209.

DAC-1980-dAbreuT #concurrent #fault #functional

An accurate functional level concurrent fault simulator (MAd, EWT), pp. 210–217.

DAC-1980-David #architecture

An integrated CAD system for architecture (BTD), pp. 218–225.

DAC-1980-SatoO #problem

A prestructuring model for system arrangement problems (KS, CLO), pp. 226–236.

DAC-1980-Jayakumar #data type #interactive

A data structure for interactive placement of rectangular objects (VJ), pp. 237–242.

DAC-1980-HeynsSB #algorithm #problem

A line-expansion algorithm for the general routing problem with a guaranteed solution (WH, WS, HB), pp. 243–249.

DAC-1980-TadaYKS #performance #strict #using

A fast maze router with iterative use of variable search space restriction (FT, KY, TK, TS), pp. 250–254.

DAC-1980-LorenzettiS #implementation #multi

An implementation of a saturated zone multi-layer printed circuit board router (MJL, RJSI), pp. 255–262.

DAC-1980-McGrathW #design #layout #verification

Design integrity and immunity checking: A new look at layout verification and design rule checking (EJM, TW), pp. 263–268.

DAC-1980-ChaoHY #approach #consistency #layout

A hierarchical approach for layout versus circuit consistency check (SPC, YSH, LMY), p. 269.

DAC-1980-ChaoHY80a #approach #consistency #layout

A hierarchical approach for layout versus circuit consistency check (SPC, YSH, LMY), pp. 270–276.

DAC-1980-MitsuhashiCTY #analysis

An integrated mask artwork analysis system (TM, TC, MT, KY), pp. 277–284.

DAC-1980-WesteA #design #performance

An IC design station needs a high performance color graphic display (NW, BDA), pp. 285–291.

DAC-1980-ClaryKS #design #interactive

SIDS (A Symbolic Interactive Design System) (DC, RK, SS), pp. 292–295.

DAC-1980-Skinner #interactive

Interactive wiring system (FDS), pp. 296–308.

DAC-1980-BiehlGH #optimisation #problem

Optimization of the influence of problem modifications on given microprogrammed controllers (GB, WG, PSH), pp. 309–317.

DAC-1980-DukeM #design #logic #named

Alex: A conversational, hierarchical logic design system (KAD, KM), pp. 318–327.

DAC-1980-KoppelmanM #logic #verification

Verifying deep logic hierarchies with ALEX (GMK, KM), pp. 328–335.

DAC-1980-Allen #automation #design

A contemporary perspective on design automation and VLSI in the 80’s (JA), pp. 338–339.

DAC-1980-Gwyn #automation #design #roadmap

Design automation trends for VLSI in the 1980s (CWG), p. 340.

DAC-1980-Jacobs #automation #design

Design automation and VLSI in the 80’s (RMJ), p. 341.

DAC-1980-Lee #design #tool support

Design tools for VLSI (BL), p. 342.

DAC-1980-Newton #challenge #design

The VLSI design challenge of the 80’s (ARN), pp. 343–344.

DAC-1980-Roberts #challenge #design #named

VLSI — a challenge for system designers (MBR), p. 345.

DAC-1980-Sapiro #automation

Desisn automation and VLSI in the 80’s (SS), pp. 346–347.

DAC-1980-Mallmann #using

The management of engineering changes using the PRIMUS system (FPM), pp. 348–361.

DAC-1980-SchnurmannP #interactive #testing

An interactive test data system for LSI production testing (HDS, RMP), pp. 362–366.

DAC-1980-SmithSTW #automation #design

A tool to support design automation in batch manufacturing (GLS, SAS, LLT, WLW), pp. 367–373.

DAC-1980-UlrichLPTKEB #concurrent #fault #performance #simulation

High-speed concurrent fault simulation with vectors and scalars (EU, DL, NP, JT, MK, TE, RB), pp. 374–380.

DAC-1980-Mourad

An optimized ATPG (SM), pp. 381–385.

DAC-1980-GiambiasiMM #deduction #fault #simulation

Methods for generalized deductive fault simulation (NG, AM, DM), pp. 386–392.

DAC-1980-ThompsonKRRSB #functional #simulation

The incorporation of functional level element routines into an existing digital simulation system (EWT, PGK, WRRJ, DR, JS, RvB), pp. 394–401.

DAC-1980-SahniB #automation #complexity #design #problem

The complexity of design automation problems (SS, AB), pp. 402–411.

DAC-1980-Donath #automation #complexity #design

Complexity theory and design automation (WED), pp. 412–419.

DAC-1980-Yates #analysis #design #metric #process

Design process analysis: A measurement and analysis technique (KDY), pp. 420–421.

DAC-1980-Bering #design

The electronics engineer’s design station (DEB), pp. 422–429.

DAC-1980-CarmodyBMWH #design #interactive

An Interactive Graphics System for custom design (PC, AMB, JKM, AW, JLH), pp. 430–439.

DAC-1980-MacdonaldPP #composition #documentation

Technical documentation by “MAGIC” (Machine Aided Graphics for Illustration and Composition (JBM, MKP, MJP), pp. 440–445.

DAC-1980-DyerLMS #design #simulation #using

The use of graphics processors for circuit design simulation at GTE AE Labs (JD, AL, EJM, WDS), pp. 446–450.

DAC-1980-CoxC #array #automation #standard

The Standard Transistor Array (star) (Part II automatic cell placement techniques) (GWC, BDC), pp. 451–457.

DAC-1980-ShiraishiH #performance #slicing

Efficient placement and routing techniques for master slice LSI (HS, FH), pp. 458–464.

DAC-1980-SmithSP #component #named #performance

Comet — a fast component placer (VKS, RJSI, PAP), pp. 465–471.

DAC-1980-LuebbertU

Gate assignment and pack placement: Two approaches compared (FL, MU), pp. 472–482.

DAC-1980-LeinwandL #algebra #analysis #behaviour #nondeterminism

Algebraic analysis of nondeterministic behavior (SML, TL), pp. 483–493.

DAC-1980-KarpovskyS #component #detection #fault #standard

Detecting bridging and stuck-at faults at input and output pins of standard digital components (MGK, SYHS), pp. 494–505.

DAC-1980-CasavantGK #automation #dependence #design #graph

Automatic design with dependence graphs (AEC, DDG, DJK), pp. 506–515.

DAC-1980-Armstrong #what

A CAD user’s perspective what gets done right wrong and not at all (RAA), p. 517.

DAC-1980-Fitch #question

Will your bridge stand the load? (AEF), p. 518.

DAC-1980-Garvin

Observations of a CAD user (DJG), p. 519.

DAC-1980-NishiokaKNYCNFU #automation #multi

An automatic routing system for high density multilayer printed wiring boards (IN, TK, HN, SY, TC, TN, TF, MU), pp. 520–527.

DAC-1980-CoteP #algorithm #problem

The interchange algorithms for circuit placement problems (LCC, AMP), pp. 528–534.

DAC-1980-SzepieniecO #approach #layout #problem

The genealogical approach to the layout problem (AAS, RHJMO), pp. 535–542.

DAC-1980-DarringerJ #logic #synthesis

A new look at logic synthesis (JAD, WHJJ), pp. 543–549.

DAC-1980-Shiva #logic #synthesis

Combinational logic synthesis from an HDL description (SGS), pp. 550–555.

DAC-1980-SingletonC #automation #design #scalability

Practical automated design of LSI for large computers (JPS, NRC), pp. 556–559.

DAC-1980-Ulrich #flexibility #logic #performance #simulation

Table lookup techniques for fast and flexible digital logic simulation (EU), pp. 560–563.

DAC-1980-Powell #analysis

Justification and financial analysis for CAD (REP), pp. 564–571.

DAC-1980-HanauL #approach #design #interactive #prototype #simulation

A prototyping and simulation approach to interactive computer system design (PRH, DRL), pp. 572–578.

DAC-1980-BlissH #implementation

Selecting and successfully implementing a turnkey computer graphics system (FB, GMH), pp. 579–584.

DAC-1980-Wilmore #representation

A hierarchical bit-map format for the representation of IC mask data (JAW), pp. 585–589.

DAC-1980-SoukupR #layout #representation

Cell map representation for hierarchical layout (JS, JR), pp. 591–594.

DAC-1980-Dunlop

SLIM-the translation of symbolic layouts into mask data (AED), pp. 595–602.

DAC-1980-Lauther #data type

A data structure for gridless routing (UL), pp. 603–609.

DAC-1980-NhamB #multi

A multiple delay simulator for MOS LSI circuits (HNN, AKB), pp. 610–617.

DAC-1980-AgrawalBKNP

A mixed-mode simulator (VDA, AKB, PK, HNN, EPS), pp. 618–625.

DAC-1980-SasakiYKNTN #logic #named #scalability #verification

MIXS: A mixed level simulator for large digital system logic verification (TS, AY, SK, TN, KT, NN), pp. 626–633.

DAC-1980-NashRST #functional #simulation

Functional level simulation at Raytheon (DCN, KR, PS, MT), pp. 634–641.

DAC-1980-Daram

Position statement — CAD for VLSI (SBD), p. 642.