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Travelled to:
1 × Czech Republic
1 × Norway
1 × Singapore
2 × Italy
Collaborated with:
J.Derrick G.Smith I.J.Hayes G.Schellhorn O.Travkin H.Wehrheim R.Jagadeesan J.Riely L.Groves B.Tofan
Talks about:
architectur (3) verifi (3) transact (2) lineariz (2) relax (2) defin (2) quiescent (1) multicor (1) guarante (1) reactiv (1)

Person: Brijesh Dongol

DBLP DBLP: Dongol:Brijesh

Contributed to:

ECOOP 20152015
FM 20152015
FM 20142014
IFM 20142014
IFM 20122012
POPL 20182018

Wrote 6 papers:

ECOOP-2015-DongolDGS #architecture #concurrent #correctness #manycore
Defining Correctness Conditions for Concurrent Objects in Multicore Architectures (BD, JD, LG, GS), pp. 470–494.
FM-2015-DerrickDSTW #transaction #verification
Verifying Opacity of a Transactional Mutex Lock (JD, BD, GS, OT, HW), pp. 161–177.
FM-2014-DerrickDSTTW #consistency #verification
Quiescent Consistency: Defining and Verifying Relaxed Linearizability (JD, BD, GS, BT, OT, HW), pp. 200–214.
IFM-2014-DerrickSD #architecture #verification
Verifying Linearizability on TSO Architectures (JD, GS, BD), pp. 341–356.
IFM-2012-DongolH #multi #reasoning #source code
Rely/Guarantee Reasoning for Teleo-reactive Programs over Multiple Time Bands (BD, IJH), pp. 39–53.
POPL-2018-DongolJR #architecture #memory management #transaction
Transactions in relaxed memory architectures (BD, RJ, JR), p. 29.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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