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Travelled to:
1 × Germany
Collaborated with:
G.Prenat G.d.Pendina O.Goncalves K.Jaber B.Dieny R.C.Sousa I.L.Prejbeanu J.Nozieres
Talks about:
replac (1) memori (1) magnet (1) ultra (1) power (1) logic (1) dram (1) chip (1) low (1)

Person: C. Layer

DBLP DBLP: Layer:C=

Contributed to:

DATE 20142014

Wrote 1 papers:

DATE-2014-PrenatPLGJDSPN #logic #power management
Magnetic memories: From DRAM replacement to ultra low power logic chips (GP, GdP, CL, OG, KJ, BD, RCS, ILP, JPN), p. 1.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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