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Travelled to:
1 × USA
Collaborated with:
R.Raina R.Bailey C.Njinda R.F.Molyneaux
Talks about:
regener (1) circuit (1) effici (1) design (1) clock (1) test (1) scan (1)

Person: Charlie Beh

DBLP DBLP: Beh:Charlie

Contributed to:

DAC 19971997

Wrote 1 papers:

DAC-1997-RainaBNMB #design #performance #testing
Efficient Testing of Clock Regenerator Circuits in Scan Designs (RR, RB, CN, RFM, CB), pp. 95–100.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.