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Travelled to:
1 × France
3 × USA
Collaborated with:
K.Lin H.Ho J.Kuo H.Liaw K.Tran
Talks about:
asynchron (2) synthesi (2) circuit (2) automat (2) microprocessor (1) decomposit (1) function (1) diagnosi (1) approach (1) program (1)

Person: Chen-Shang Lin

DBLP DBLP: Lin:Chen=Shang

Contributed to:

EDAC-ETC-EUROASIC 19941994
DAC 19911991
DAC 19891989
DAC 19881988

Wrote 4 papers:

EDAC-1994-LinKL #approach #synthesis
Direct Synthesis of Hazard-Free Asynchronous Circuits from STGs Based on Lock Relation and BG-Decomposition Approach (KJL, JWK, CSL), pp. 178–183.
DAC-1991-LinL #automation #synthesis
Automatic Synthesis of Asynchronous Circuits (KJL, CSL), pp. 296–301.
DAC-1989-LiawTL #named #verification
VVDS: A Verification/Diagnosis System for VHDL (HTL, KTT, CSL), pp. 435–440.
DAC-1988-LinH #automation #functional #generative
Automatic Functional Test Program Generation for Microprocessors (CSL, HFH), pp. 605–608.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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