Travelled to:1 × France
Collaborated with:L.Chen M.Wu R.Tsay
Talks about:accur (2) processor (1) system (1) simul (1) model (1) level (1) count (1) fast (1) cycl (1)
Person: Chen Kang Lo
DBLP: Lo:Chen_Kang
Contributed to:
2011Wrote 1 papers:
- DATE-2011-LoCWT #modelling #performance #simulation
- Cycle-count-accurate processor modeling for fast and accurate system-level simulation (CKL, LCC, MHW, RST), pp. 341–346.