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Travelled to:
1 × Italy
1 × Portugal
1 × Switzerland
1 × Taiwan
1 × USA
Collaborated with:
C.Pagetti J.Forget M.Cordovilla E.Noulard R.Wyss X.Dumas P.Dhaussy E.Bonnafous D.Lesens J.Baro Y.A.Ameur G.Bel S.Pairault V.Wiels
Talks about:
system (3) multiprocessor (2) schedul (2) period (2) design (2) multi (2) embed (2) end (2) architectur (1) partial (1)

Person: Frédéric Boniol

DBLP DBLP: Boniol:Fr=eacute=d=eacute=ric

Contributed to:

SAC 20132013
SAC 20122012
SAC 20112011
SAC 20102010
LCTES 20032003

Wrote 6 papers:

SAC-2013-WyssBPF #design #latency #multi
End-to-end latency computation in a multi-periodic design (RW, FB, CP, JF), pp. 1682–1687.
SAC-2012-BaroBCNP #multi #scheduling
Off-line (Optimal) multiprocessor scheduling of dependent periodic tasks (JB, FB, MC, EN, CP), pp. 1815–1820.
SAC-2011-CordovillaBNP #multi #scheduling
Multiprocessor schedulability analyser (MC, FB, EN, CP), pp. 735–741.
SAC-2011-DumasDBB #partial order #verification
Application of partial-order methods for the verification of closed-loop SDL systems (XD, PD, FB, EB), pp. 1666–1673.
SAC-2010-ForgetBLP #architecture #design #embedded #multi #realtime
A real-time architecture design language for multi-rate embedded control systems (JF, FB, DL, CP), pp. 527–534.
LCTES-2003-AmeurBBPW #analysis #embedded #robust
Robustness analysis of avionics embedded systems (YAA, GB, FB, SP, VW), pp. 123–132.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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