Travelled to:1 × USA
Collaborated with:B.Agrawal N.Srivastava S.Lin T.Sherwood K.Banerjee
Talks about:processor (1) hierarchi (1) thermal (1) perform (1) analysi (1) vertic (1) memori (1) integr (1) awar (1)
Person: Gian Luca Loi
DBLP: Loi:Gian_Luca
Contributed to:
2006Wrote 1 papers:
- DAC-2006-LoiASLSB #3d #analysis #performance
- A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy (GLL, BA, NS, SCL, TS, KB), pp. 991–996.