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Travelled to:
1 × USA
Collaborated with:
S.Noda H.Yoshizawa E.Fukuda H.Kawanishi T.Fujii
Talks about:
algorithm (1) function (1) automat (1) layout (1) block (1) array (1) gate (1) cmos (1)

Person: Haruo Kato

DBLP DBLP: Kato:Haruo

Contributed to:

DAC 19851985

Wrote 1 papers:

DAC-1985-NodaYFKKF #algorithm #array #automation #layout
Automatic layout algorithms for function blocks of CMOS gate arrays (SN, HY, EF, HK, HK, TF), pp. 46–52.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.