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Travelled to:
2 × USA
Collaborated with:
H.Yoshizawa K.Kani S.Noda E.Fukuda H.Kato T.Fujii
Talks about:
array (2) algorithm (1) procedur (1) function (1) heurist (1) automat (1) layout (1) order (1) block (1) gate (1)

Person: Hiroshi Kawanishi

DBLP DBLP: Kawanishi:Hiroshi

Contributed to:

DAC 19851985
DAC 19751975

Wrote 2 papers:

DAC-1985-NodaYFKKF #algorithm #array #automation #layout
Automatic layout algorithms for function blocks of CMOS gate arrays (SN, HY, EF, HK, HK, TF), pp. 46–52.
DAC-1975-YoshizawaKK #array #heuristic
A heuristic procedure for ordering MOS arrays (HY, HK, KK), pp. 384–393.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.