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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × Brazil
1 × Canada
1 × France
1 × South Korea
1 × Sweden
1 × The Netherlands
2 × United Kingdom
Collaborated with:
T.Jéron V.Rusu M.Samaan Y.Falcone G.Delaval É.Rutten J.Dubreil A.Khoumsi S.Pinisetty J.Fernandez L.Mounier V.Tschaen B.Jeannet
Talks about:
properti (4) control (4) test (4) safeti (3) synthesi (2) automat (2) system (2) verif (2) time (2) nondeterminist (1)

Person: Hervé Marchand

DBLP DBLP: Marchand:Herv=eacute=

Contributed to:

SAC 20142014
ICTSS 20102010
LCTES 20102010
TestCom/FATES 20092009
FM 20052005
TestCom 20042004
FATES 20032003
World Congress on Formal Methods 19991999

Wrote 8 papers:

SAC-2014-PinisettyFJM #runtime
Runtime enforcement of regular timed properties (SP, YF, TJ, HM), pp. 1279–1286.
More Testable Properties (YF, JCF, TJ, HM, LM), pp. 30–46.
LCTES-2010-DelavalMR #composition #contract #synthesis
Contracts for modular discrete controller synthesis (GD, HM, ÉR), pp. 57–66.
TestCom-FATES-2009-MarchandDJ #automation #data access #security #testing
Automatic Testing of Access Control for Security Properties (HM, JD, TJ), pp. 113–128.
FM-2005-RusuMJ #automation #consistency #safety #testing #validation #verification
Automatic Verification and Conformance Testing for Validating Safety Properties of Reactive Systems (VR, HM, TJ), pp. 189–204.
TestCom-2004-RusuMTJJ #safety #testing #verification
From Safety Verification to Safety Testing (VR, HM, VT, TJ, BJ), pp. 160–176.
FATES-2003-KhoumsiJM #generative #nondeterminism #realtime #testing
Test Cases Generation for Nondeterministic Real-Time Systems (AK, TJ, HM), pp. 131–146.
FM-v2-1999-MarchandS #design #incremental #synthesis #using
Incremental Design of a Power Transformer Station Controller Using a Controller Synthesis Methodology (HM, MS), pp. 1605–1624.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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