Jaejin Lee, Bruce R. Childers
Proceedings of the 11th Conference on Languages, Compilers, and Tools for Embedded Systems
LCTES, 2010.
@proceedings{LCTES-2010, acmid = "1755888", address = "Stockholm, Sweden", editor = "Jaejin Lee and Bruce R. Childers", isbn = "978-1-60558-953-4", publisher = "{ACM}", title = "{Proceedings of the 11th Conference on Languages, Compilers, and Tools for Embedded Systems}", year = 2010, }
Contents (18 items)
- LCTES-2010-LiXLZ #analysis #approximate #architecture #memory management
- Analysis and approximation for bank selection instruction minimization on partitioned memory architecture (ML, CJX, TL, YZ), pp. 1–8.
- LCTES-2010-PykaKMM #approach #embedded #framework #platform
- Versatile system-level memory-aware platform description approach for embedded MPSoCs (RP, FK, PM, SM), pp. 9–16.
- LCTES-2010-KimLSP #memory management #multi
- Operation and data mapping for CGRAs with multi-bank memory (YK, JL, AS, YP), pp. 17–26.
- LCTES-2010-ForoozannejadHHG #analysis #streaming
- Look into details: the benefits of fine-grain streaming buffer analysis (MHF, MH, TLH, SG), pp. 27–36.
- LCTES-2010-PerathonerRTLR #analysis #modelling #performance
- Modeling structured event streams in system level performance analysis (SP, TR, LT, KL, JR), pp. 37–46.
- LCTES-2010-BrandtSS #concurrent #specification
- Translating concurrent action oriented specifications to synchronous guarded actions (JB, KS, SKS), pp. 47–56.
- LCTES-2010-DelavalMR #composition #contract #synthesis
- Contracts for modular discrete controller synthesis (GD, HM, ÉR), pp. 57–66.
- LCTES-2010-SchlicklingP #analysis #automation #modelling
- Semi-automatic derivation of timing models for WCET analysis (MS, MP), pp. 67–76.
- LCTES-2010-ViskicLG #automation #design #framework #generative #network #platform #process
- Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications (IV, LY, DG), pp. 77–84.
- LCTES-2010-OzturkKIN #compilation #multi #reliability
- Compiler directed network-on-chip reliability enhancement for chip multiprocessors (ÖÖ, MTK, MJI, SHKN), pp. 85–94.
- LCTES-2010-KulkarniJW #optimisation #performance #sequence
- Improving both the performance benefits and speed of optimization phase sequence searches (PAK, MRJ, DBW), pp. 95–104.
- LCTES-2010-LiZ #embedded #mobile #performance
- An efficient code update scheme for DSP applications in mobile embedded systems (WL, YZ), pp. 105–114.
- LCTES-2010-WernsingS #adaptation #framework #manycore
- Elastic computing: a framework for transparent, portable, and adaptive multi-core heterogeneous computing (JRW, GS), pp. 115–124.
- LCTES-2010-BiehlCT #analysis #development #embedded #modelling #safety
- Integrating safety analysis into the model-based development toolchain of automotive embedded systems (MB, DJC, MT), pp. 125–132.
- LCTES-2010-FischmeisterB #execution #monitoring
- Sampling-based program execution monitoring (SF, YB), pp. 133–142.
- LCTES-2010-ShrivastavaLJ #embedded #equation #fault
- Cache vulnerability equations for protecting data in embedded processor caches from soft errors (AS, JL, RJ), pp. 143–152.
- LCTES-2010-AltmeyerMR #analysis #bound
- Resilience analysis: tightening the CRPD bound for set-associative caches (SA, CM, JR), pp. 153–162.
- LCTES-2010-WangLWQSG #memory management #named
- RNFTL: a reuse-aware NAND flash translation layer for flash memory (YW, DL, MW, ZQ, ZS, YG), pp. 163–172.
6 ×#analysis
4 ×#embedded
3 ×#framework
3 ×#memory management
3 ×#modelling
3 ×#performance
2 ×#automation
2 ×#multi
4 ×#embedded
3 ×#framework
3 ×#memory management
3 ×#modelling
3 ×#performance
2 ×#automation
2 ×#multi