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Travelled to:
2 × USA
Collaborated with:
R.Vemuri R.Dutta P.Mamtora P.Sinha N.Kumar R.Vutukuru
Talks about:
synthesi (2) system (2) level (2) high (2) distribut (1) function (1) explor (1) experi (1) design (1) valid (1)

Person: Jayanta Roy

DBLP DBLP: Roy:Jayanta

Contributed to:

DAC 19931993
DAC 19921992

Wrote 2 papers:

DAC-1993-VemuriMSKRV #case study #experience #functional #synthesis #validation
Experiences in Functional Validation of a High Level Synthesis System (RV, PM, PS, NK, JR, RV), pp. 194–201.
DAC-1992-DuttaRV #distributed #synthesis
Distributed Design-Space Exploration for High-Level Synthesis Systems (RD, JR, RV), pp. 644–650.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.