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Travelled to:
1 × USA
Collaborated with:
C.Chang S.Huang Y.Ho H.Wang Y.Lu
Talks about:
clock (2) match (1) zero (1) type (1) tree (1) skew (1) gate (1)

Person: Jia-Zong Lin

DBLP DBLP: Lin:Jia=Zong

Contributed to:

DAC 20082008

Wrote 1 papers:

DAC-2008-ChangHHLWL
Type-matching clock tree for zero skew clock gating (CMC, SHH, YKH, JZL, HPW, YSL), pp. 714–719.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.