Travelled to:1 × France
1 × USA
Collaborated with:Z.Chen
Talks about:rectilinear (1) electromigr (1) placement (1) constrain (1) untangl (1) steiner (1) obstacl (1) multipl (1) detour (1) design (1)
Person: Jin-Tai Yan
DBLP: Yan:Jin=Tai
Contributed to:
2011
2010Wrote 3 papers:
- DATE-2011-ChenY #design
- Timing-constrained I/O buffer placement for flip-chip designs (ZWC, JTY), pp. 619–624.
- DATE-2011-YanC #multi
- Obstacle-aware multiple-source rectilinear Steiner tree with electromigration and IR-drop avoidance (JTY, ZWC), pp. 449–454.
- DAC-2010-YanC
- Two-sided single-detour untangling for bus routing (JTY, ZWC), pp. 206–211.