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Travelled to:
1 × USA
Collaborated with:
D.F.Wong
Talks about:
placement (1) routabl (1) switch (1) driven (1) minim (1) maxim (1) fpgas (1) clock (1) bound (1) alloc (1)

Person: Kai Zhu

DBLP DBLP: Zhu:Kai

Contributed to:

DAC 19941994

Wrote 2 papers:

DAC-1994-ZhuW #bound
Switch Bound Allocation for Maximizing Routability in Timing-Driven Routing of FPGAs (KZ, DFW), pp. 165–170.
DAC-1994-ZhuW94a
Clock Skew Minimization During FPGA Placement (KZ, DFW), pp. 232–237.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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