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Travelled to:
3 × USA
Collaborated with:
M.Muraoka T.Hirano N.Shiraki H.Iida H.Kikuchihara M.Murakami H.Andou I.Yamamoto Y.Mori Y.Koike K.Shouji
Talks about:
system (2) design (2) logic (2) equip (2) vlsi (2) algorithm (1) electron (1) automat (1) analysi (1) switch (1)

Person: Kazuyuki Hirakawa

DBLP DBLP: Hirakawa:Kazuyuki

Contributed to:

DAC 19851985
DAC 19821982
DAC 19731973

Wrote 4 papers:

DAC-1985-AndouYMKSH #algorithm #automation
Automatic routing algorithm for VLSI (HA, IY, YM, YK, KS, KH), pp. 785–788.
DAC-1985-MuraokaIKMH #analysis #named
ACTAS: an accurate timing analysis system for VLSI (MM, HI, HK, MM, KH), pp. 152–158.
DAC-1982-HirakawaSM #logic #simulation
Logic simulation for LSI (KH, NS, MM), pp. 755–761.
DAC-1973-HiranoH #design #logic
Computer aided design system for logic equipment applied to design of electronic switching equipment (TH, KH), pp. 205–212.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.