Travelled to:
1 × USA
Collaborated with:
∅
Talks about:
automat
(1)
layout
(1)
verif
(1)
vlsi
(1)
Person:
Laurin Williams
DBLP: Williams:Laurin
Contributed to:
1981
Wrote 1 papers:
DAC-1981-Williams
#automation
#layout
#verification
Automatic VLSI layout verification (
LW
), pp. 726–732.
Bibliography of Software Language Engineering in Generated Hypertext
(
BibSLEIGH
) is created and maintained by
Dr. Vadim Zaytsev
.
Hosted as a part of
SLEBOK
on
GitHub
.