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Travelled to:
1 × USA
Collaborated with:
L.A.Glasser
Talks about:
circuit (1) power (1) optim (1) delay (1) vlsi (1)

Person: Lennox Hoyte

DBLP DBLP: Hoyte:Lennox

Contributed to:

DAC 19841984

Wrote 1 papers:

DAC-1984-GlasserH #optimisation
Delay and power optimization in VLSI circuits (LAG, LH), pp. 529–535.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.