Travelled to:1 × USA
Collaborated with:J.Wenin J.Verhasselt J.Leonard P.Guebels
Talks about:constrain (1) parasit (1) system (1) layout (1) verif (1) vlsi (1) rule (1) base (1)
Person: Marc Van Camp
DBLP: Camp:Marc_Van
Contributed to:
1989Wrote 1 papers:
- DAC-1989-WeninVCLG #layout #rule-based #verification
- Rule-based VLSI Verification System Constrained by Layout Parasitics (JW, JV, MVC, JL, PG), pp. 662–667.